EX-7103- VLSI Syllabus
RGTU/RGPV VLSI Syllabus
Electrical & Electronics Engineering(EX) VII-7th Semester Syllabus
EX-7103- VLSI Course Contents:
Unit-I
Overview of VLSI Design Methodology VLSI design process, Architectural design, Logical design, Physical design, Layout styles, Full custom & Semi custom approaches. Basic Electrical Properties of MOS and CMOS Circuits, NMOS, PMOS, Transistors, MOS device equations, Basic DC equations second order effects, MOS modules, Small signal AC characteristics, NMOS inverter, Steered input to an NMOS inverter, depletion mode & enhancement mode pull ups, CMOS inverter, DC characteristics, inverter delay, Pass transistor, transmission gate.
Overview of VLSI Design Methodology VLSI design process, Architectural design, Logical design, Physical design, Layout styles, Full custom & Semi custom approaches. Basic Electrical Properties of MOS and CMOS Circuits, NMOS, PMOS, Transistors, MOS device equations, Basic DC equations second order effects, MOS modules, Small signal AC characteristics, NMOS inverter, Steered input to an NMOS inverter, depletion mode & enhancement mode pull ups, CMOS inverter, DC characteristics, inverter delay, Pass transistor, transmission gate.
Unit-II
VLSI Fabrication Techniques An overview of wafer fabrication, Wafer processing, Oxidation, Pattering, Diffusion, Ion implantation, Deposition, silicon gate NMOS process, CMOS processor, N well, P well, Twintub, Silicon on insulator, CMOS process enhancements interconnect circuit elements latch up, latch up triggering & prevention techniques.
Unit-III
MOS and CMOS Circuit Design Process-Layer representation, Stick diagrams, NMOS design style, CMOS design style, Design rules, Need for design rules, Mead Conway design rules for silicon gate NMOS process, CMOS n well/ p well based design rules simple layout examples, Sheet resistance estimation. Capacitance estimation, Area capacitance, Wiring capacitance, Driving large capacitive loads.
Unit-IV
NMOS & CMOS Circuit and Logic Design, Switch logic, Pass transistor & Transmission gate, gate logic, inverter, two input NAND gate, NOR gate other form of CMOS logic, Dynamic CMOS logic Clocked CMOS logic, Precharged domino CMOS logic, Structured design, Simple combinational logic design examples, Parity generator, Multiplexers clocked sequential circuits, Two phase clocking, charge storage, Dynamic register element, NMOS and CMOS, Dynamic shift register, semi static register, J-K flip flop.
Unit-V
Subsystem Design Process Design of a 4-bit shifter, general arrangement of 4 bit arithmetic processor, Design of a ALU system implementing ALU functions with an adder, carry look ahead adders, Multipliers, Serial parallel multipliers, Pipe lined multiplier array, Modified Booth's algorithm
References:
1. Douglas "A puchnel and Kamrah Eshraghian, Basic VLSI design, Prentice Hall of India.
2. Neil H.E. West and Kamrah Eshraghigm "Principle of CMOS VLSI design: A System perspective", Addison wisely.
3. Eugene D Fabricus " Introduction to VLSI design" McGraw Hill International.
4. Amar Mukherjee, "Introduction to NMOS & COMS VLSI design" Prentice Hall.
5. Wayne Wolf "Modern VLSI design- Systems on Silicon", Prentice Hall.
6. Carver Mead a Lynn Conway, "Introduction to VLSI Systems", Addison Wesley.
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