RGPV / RGTU B.E. EI, 4th (IV) Semester EI 403 Analog Electronics Revised syllabus Electronics and Instrumentation

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Rajiv Gandhi Technological University, Bhopal (MP)
B.E. (EI) Electronics and Instrumentation Engineering FOURTH IV SEMESTER
EI 403 Analog Electronics
Revised Syllabus and Scheme of Examination Effective from July 2007

Unit I Bipolar Junction Transistor: Concept of load line, Biasing and bias stability, transistor at low and high frequencies, Transistor modeling – transistor hybrid model, the h parameters, the hybrid pi- model, gain bandwidth product.

Unit II JFET: Construction, Operation and Biasing of JFET, and MOSFET device, The FET small signal model, V-I characteristics, biasing and load line equivalent circuits of the device, analysis of FET amplifiers.

Unit III Multistage or Cascade amplifier: classification of multi-stage amplifier, coupling and frequency response of cascaded systems, effect of cascading on voltage gain, current gain, phase, input and output impedances and bandwidth of cascaded or multistage amplifiers, types of coupling, cascade and cascade circuits, tiller theorem, Darlington pair, bootstrap circuit.

Unit IV Tuned amplifier: single tuned, double tuned and stagger tuned amplifiers characteristics
and their frequency response.

Unit V Power amplifier: Class A, B, AB, push pull and Class C power amplifiers, Comparisons of their efficiencies, types of distortion.

Analog Electronics References:
1. Integrated Electronics. - Millman Halkias TMH
2. Electronic Devices & circuits – Boyelstad & Neshelsky – PHI
3. Electronic Devices & Circuits – David A.Bell – PHI
4. Principles of Electronic Devices – Malvino
5. Electronics Devices and circuits – Salivahanan Vallavraj, TMH

Analog Electronics List of Experiments (Expandable):
All experiments (wherever applicable) should be performed through the following steps.
Step 1: Circuit should be designed/ drafted on paper.
Step 2: The designed/drafted circuit should be simulated using Simulation S/W (TINA-V7/ PSPICE/ Labview/ CIRCUIT MAKER).
Step 3: The designed/drafted circuit should be tested on the bread board and compare the results with the simulated results.
Step 4: The bread board circuit should be fabricated on PCB prepared on PCB machine.

1. To plot common base configuration input/output characteristic of PNP bipolar junction
transistor.
2. To plot common emitter configuration input/output characteristic of NPN bipolar junction
transistor.
3. To plot common Collector base configuration input/output characteristic of PNP bipolar
junction transistor.
4. To draw the characteristics of FET.
5. To draw the frequency response characteristics of various types of amplifiers e.g. tuned
and power amplifiers.

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